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2019 20th International Workshop on Microprocessor/SoC Test, Security and Verification (MTV)

Dec. 9 2019 to Dec. 10 2019

Austin, TX, USA

ISBN: 978-1-7281-5025-3

Table of Contents

[Title page i]Freely available from IEEE.pp. 1-1
[Title page iii]Freely available from IEEE.pp. 3-3
[Copyright notice]Freely available from IEEE.pp. 4-4
Table of contentsFreely available from IEEE.pp. 5-6
MTV 2019 PrefaceFreely available from IEEE.pp. 7-8
MTV 2019 CommitteesFreely available from IEEE.pp. 9-10
MTV 2019 AcknowledgmentsFreely available from IEEE.pp. 11-11
MTV 2019 Corporate SupportersFreely available from IEEE.pp. 12-12
Expediting Design Bug Discovery in Regressions of x86 Processors Using Machine LearningFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Ahmed Wahba, Justin Hohnerlein, Farhan Rahman
Open-Source Validation Suite for RISC-VFull-text access may be available. Sign in or learn about subscription options.pp. 7-12
by Mikhail Chupilko, Alexander Kamkin, Alexander Protsenko
A Verification Framework of Neural Processing Unit for Super ResolutionFull-text access may be available. Sign in or learn about subscription options.pp. 13-17
by Jinsae Jung, Jaeun Park, Apurva Kumar
Backside Security Assessment of Modern SoCsFull-text access may be available. Sign in or learn about subscription options.pp. 18-24
by Mir Tanjidur Rahman, Navid Asadizanjani
On the Detection of Always-On Hardware Trojans Supported by a Pre-Silicon Verification MethodologyFull-text access may be available. Sign in or learn about subscription options.pp. 25-30
by Annachiara Ruospo, Ernesto Sanchez
Design Crawler: A Web Application for Digital Design Metadata AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 31-34
by Sherif Hosny, Amr Baher
Smarter Disk Space Management for Silicon WorkflowsFull-text access may be available. Sign in or learn about subscription options.pp. 35-40
by Jigar Kuverji Savla
RamGen: Moving Memories from Physical to the Logical DomainFull-text access may be available. Sign in or learn about subscription options.pp. 41-44
by Jeff Scott, Jonathan Sadowsky, Jigar Kuverji Savla
Techniques for Debug of Low Power SoCsFull-text access may be available. Sign in or learn about subscription options.pp. 45-49
by Sankaran Menon, Chinna Prudvi, Rolf Kuehnis, Sukhbinder Singh Takhar, Spencer Millican, Eric Rentschler, Pandy Kalimuthu, Preeti Ranjan Panda, Priyadarsan Patra, Ashish Gupta
Hardware and Software Co-Verification from Security PerspectiveFull-text access may be available. Sign in or learn about subscription options.pp. 50-55
by Kejun Chen, Qingxu Deng, Yumin Hou, Yier Jin, Xiaolong Guo
Multilayer Camouflaged Secure Boot for SoCsFull-text access may be available. Sign in or learn about subscription options.pp. 56-61
by Ali Shuja Siddiqui, Geraldine Shirley Nicholas, Sam Reji Joseph, Yutian Gui, Jim Plusquellic, Marten Van Dijk, Fareena Saqib
Automated Test Picker for Complex Microprocessor Verification EnvironmentFull-text access may be available. Sign in or learn about subscription options.pp. 62-64
by Chetas Mapara, Jerrin Jose
Case Study: SoC Performance Verification and Static Verification of RTL ParametersFull-text access may be available. Sign in or learn about subscription options.pp. 65-72
by Prokash Ghosh, Srivastava Rohit
Design Space Exploration for Hotspot DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 73-77
by Gaurav Rajavendra Reddy, Yiorgos Makris
Author IndexFreely available from IEEE.pp. 79-79
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