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PACT 2005. 14th International Conference on Parallel Architectures and Compilation Techniques

Sept. 17 2005 to Sept. 21 2005

St. Louis, MO, USA

Table of Contents

Message from the General ChairFreely available from IEEE.pp. ix-ix
list-reviewerFreely available from IEEE.pp. xiv-xv
Optimizing Compiler for the CELL ProcessorFull-text access may be available. Sign in or learn about subscription options.pp. 161-172
by A.E. Eichenberger, K. O'Brien, K. O'Brien, Peng Wu, Tong Chen, P.H. Oden, D.A. Prener, J.C. Shepherd, Byoungro So, Z. Sura, A. Wang, Tao Zhang, Peng Zhao, M. Gschwind
Message from the Program ChairFreely available from IEEE.pp. x-x
14th International Conference on Parallel Architectures and Compilation Techniques - Title PageFreely available from IEEE.pp. i-iii
14th Internatiionall Confference on Parallllell Archiittecttures and Compiillattiion Techniiques - Copyright PageFreely available from IEEE.pp. iv-iv
14th Internatiionall Confference on Parallllell Archiittecttures and Compiillattiion Techniiques - Table of contentsFreely available from IEEE.pp. v-viii
Tutorials and WorkshopsFull-text access may be available. Sign in or learn about subscription options.pp. xi-xi
CommitteesFreely available from IEEE.pp. xii-xiii
Data-centric transformations on non-integer iteration spacesFull-text access may be available. Sign in or learn about subscription options.pp. 133-142
by S.K. Sahoo, G. Agrawal
Multi-core to the massesFull-text access may be available. Sign in or learn about subscription options.pp. 3-3
by J. Rattner
Variational path profilingFull-text access may be available. Sign in or learn about subscription options.pp. 7-16
by E. Perelman, T. Chilimbi, B. Calder
Extended whole program pathsFull-text access may be available. Sign in or learn about subscription options.pp. 17-26
by S. Tallam, R. Gupta, Xiangyu Zhang
Instruction based memory distance analysis and its application to optimizationFull-text access may be available. Sign in or learn about subscription options.pp. 27-37
by Changpeng Fang, S. Can, S. Onder, Zhenlin Wang
HPS: hybrid profiling supportFull-text access may be available. Sign in or learn about subscription options.pp. 38-47
by H. Mousa, C. Krintz
Maximizing CMP throughput with mediocre coresFull-text access may be available. Sign in or learn about subscription options.pp. 51-62
by J.D. Davis, J. Laudon, K. Olukotun
Characterization of TCC on chip-multiprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 63-74
by A. McDonald, JaeWoong Chung, H. Chafi, Chi Cao Minh, B.D. Carlstrom, L. Hammond, C. Kozyrakis, K. Olukotun
Store-ordered streaming of shared memoryFull-text access may be available. Sign in or learn about subscription options.pp. 75-84
by T.F. Wenisch, S. Somogyi, N. Hardavellas, Jangwoo Kim, C. Gniady, A. Ailamaki, B. Falsafi
An event-driven multithreaded dynamic optimization frameworkFull-text access may be available. Sign in or learn about subscription options.pp. 87-98
by Weifeng Zhang, B. Calder, D.M. Tullsen
Design and implementation of a compiler framework for helper threading on multi-core processorsFull-text access may be available. Sign in or learn about subscription options.pp. 99-109
by Yonghong Song, S. Kalogeropulos, P. Tirumalai
Compiler directed early register releaseFull-text access may be available. Sign in or learn about subscription options.pp. 110-119
by T.M. Jones, M.F.R. O'Boyle, J. Abella, A. Gonzalez, O. Ergin
Automatic selection of compiler options using non-parametric inferential statisticsFull-text access may be available. Sign in or learn about subscription options.pp. 123-132
by M. Haneda, P.M.W. Knijnenburg, H.A.G. Wijshoff
COMPILER ANALYSIS A (TRACK II)
Data Centric Transformations on Non-Integer Iteration SpacesFull-text access may be available. Sign in or learn about subscription options.pp. 133-142
by Swarup Kumar Sahoo, Gagan Agrawal
Efficient techniques for advanced data dependence analysisFull-text access may be available. Sign in or learn about subscription options.pp. 143-153
by K. Kyriakopoulos, K. Psarris
Parallel programming and parallel abstractions in FortressFull-text access may be available. Sign in or learn about subscription options.pp. 157-157
by G.L. Steele Jr.
Exploiting coarse-grained parallelism to accelerate protein motif finding with a network processorFull-text access may be available. Sign in or learn about subscription options.pp. 173-184
by B. Wun, J. Buhler, P. Crowley
Automatic tuning matrix multiplication performance on graphics hardwareFull-text access may be available. Sign in or learn about subscription options.pp. 185-194
by Changhao Jiang, M. Snir
A distributed control path architecture for VLIW processorsFull-text access may be available. Sign in or learn about subscription options.pp. 197-206
by Hongtao Zhong, K. Fan, S. Mahlke, M. Schlansker
Variable-based multi-module data caches for clustered VLIW processorsFull-text access may be available. Sign in or learn about subscription options.pp. 207-217
by E. Gibert, J. Abella, J. Sanchez, X. Vera, A. Gonzalez
Performance analysis of system overheads in TCP/IP workloadsFull-text access may be available. Sign in or learn about subscription options.pp. 218-228
by N.L. Binkert, L.R. Hsu, A.G. Saidi, R.G. Dreslinski, A.L. Schultz, S.K. Reinhardt
Dual-core execution: building a highly scalable single-thread instruction windowFull-text access may be available. Sign in or learn about subscription options.pp. 231-242
by Huiyang Zhou
A simple divide-and-conquer approach for neural-class branch predictionFull-text access may be available. Sign in or learn about subscription options.pp. 243-254
by G.H. Loh
Trace cache sampling filterFull-text access may be available. Sign in or learn about subscription options.pp. 255-264
by M. Behar, A. Mendelson, A. Kolodny
Communication optimizations for fine-grained UPC applicationsFull-text access may be available. Sign in or learn about subscription options.pp. 267-278
by Wei-Yu Chen, C. Iancu, K. Yelick
HUNTing the overlapFull-text access may be available. Sign in or learn about subscription options.pp. 279-290
by C. Iancu, P. Husbands, P. Hargrove
Deep jam: conversion of coarse-grain parallelism to instruction-level and vector parallelism for irregular applicationsFull-text access may be available. Sign in or learn about subscription options.pp. 291-300
by P. Carribault, A. Cohen, W. Jalby
Memory state compressors for giga-scale checkpoint/restoreFull-text access may be available. Sign in or learn about subscription options.pp. 303-314
by A. Moshovos, A. Kostopoulos
Exploiting coarse-grain verification parallelism for power-efficient fault toleranceFull-text access may be available. Sign in or learn about subscription options.pp. 315-325
by M.W. Rashid, E.J. Tan, M.C. Huang, D.H. Albonesi
Memory coloring: a compiler approach for scratchpad memory managementFull-text access may be available. Sign in or learn about subscription options.pp. 329-338
by Lian Li, Lin Gao, Jingling Xue
Multiple page size modeling and optimizationFull-text access may be available. Sign in or learn about subscription options.pp. 339-349
by C. Cascaval, E. Duesterwald, P.F. Sweeney, R.W. Wisniewski
Future execution: a hardware prefetching technique for chip multiprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 350-360
by I. Ganusov, M. Burtscher
Author indexFreely available from IEEE.pp. 361-361
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