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Rapid System Prototyping, IEEE International Workshop on

July 1 2002 to July 3 2002

Darmstadt, Germany

ISSN: 1074-6005

ISBN: 0-7695-1703-X

Table of Contents

Prototyping Ethernet in the First Mile over point-to-point copperFull-text access may be available. Sign in or learn about subscription options.pp. 53-58
Introduction
Chairs? MessageFreely available from IEEE.pp. vii
Introduction
IntroductionFreely available from IEEE.pp. viii
Introduction
AcknowledgmentsFull-text access may be available. Sign in or learn about subscription options.pp. ix
Introduction
Conference CommitteesFreely available from IEEE.pp. x
Keynote Speech
Market Estimation for System Prototyping EDA SegmentFull-text access may be available. Sign in or learn about subscription options.pp. 2
Session 1: Prototyping Micro Architectures
Design of Application Specific CISC Using PEAS-IIIFull-text access may be available. Sign in or learn about subscription options.pp. 12
Session 1: Prototyping Micro Architectures
Rapid Prototyping of FPGA Based Floating Point DSP SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 19
Session 1: Prototyping Micro Architectures
Prototyping of Fuzzy Logic-Based Controllers Using Standard FPGA Development BoardsFull-text access may be available. Sign in or learn about subscription options.pp. 25
Session 2: Case Studies and Applications
A Flexible H.263 Video Coder Prototype Based on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 34
Session 2: Case Studies and Applications
Prototyping of a High Performance Generic Viterbi DecoderFull-text access may be available. Sign in or learn about subscription options.pp. 42
Session 2: Case Studies and Applications
On the Rapid Prototyping of Equalizers for OFDM SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 48
Session 2: Case Studies and Applications
Prototyping Ethernet in the First Mile over Point-to-Point CopperFull-text access may be available. Sign in or learn about subscription options.pp. 53
Session 3: Mapping to FPGAs
Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 60
Session 3: Mapping to FPGAs
Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop RoutingFull-text access may be available. Sign in or learn about subscription options.pp. 66
Session 4: Reconfigurable Software
Rapid Prototyping of Transition Management Code for Reconfigurable Control SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 76
Session 4: Reconfigurable Software
Reconfigurable Hardware Control SoftwareFull-text access may be available. Sign in or learn about subscription options.pp. 84
Session 4: Reconfigurable Software
Interfacing Software Libraries from Non-deterministic PrototypesFull-text access may be available. Sign in or learn about subscription options.pp. 92
Session 4: Reconfigurable Software
Validating Objected-Oriented Prototype of Real-Time Systems with Timed AutomataFull-text access may be available. Sign in or learn about subscription options.pp. 99
Session 5: High-Level Modeling Issues
From Object-Oriented Modeling to Code Generation for Rapid Prototyping of Embedded Electronic SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 108
Session 5: High-Level Modeling Issues
System Prototyping by Integration of Reconfigurable Hardware into a Heterogeneous System ModelFull-text access may be available. Sign in or learn about subscription options.pp. 115
Session 5: High-Level Modeling Issues
ISA Based System Design Language in HW/SW Co-Design EnvironmentFull-text access may be available. Sign in or learn about subscription options.pp. 122
Session 6: New Synthesis and Estimation Approaches
System-Level Co-Synthesis of Dataflow Dominated Applications on Reconfigurable Hardware/Software ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 130
Session 6: New Synthesis and Estimation Approaches
Power Estimation Based on Transition Activity Analysis with an Architecture Precise Rapid Prototyping SystemFull-text access may be available. Sign in or learn about subscription options.pp. 138
Session 7: Tools and Framework for Supporting RSP
Framework for Validation, Test and Analysis of Real-Time Scheduling Algorithms and Scheduler ImplementationsFull-text access may be available. Sign in or learn about subscription options.pp. 146
Session 7: Tools and Framework for Supporting RSP
A Rapid Prototyping Environment for Distributed Reconfigurable SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 153
Session 7: Tools and Framework for Supporting RSP
RAPIDO: A Modular, Multi-Board, Heterogeneous Multi-Processor, PCI Bus Based Prototyping Framework for the Validation of SoC VLSI DesignsFull-text access may be available. Sign in or learn about subscription options.pp. 159
Session 7: Tools and Framework for Supporting RSP
PICARD: Platform Concepts for Prototyping and Demonstration of High Speed Communication SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 166
Author Index
Author IndexFreely available from IEEE.pp. 171
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