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2016 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)

June 4 2016 to June 4 2016

Austin, TX, USA

Table of Contents

Buffered interconnects in 3D IC layout designFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
Topologically-geometric routingFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
Revisiting 3DIC Benefit with Multiple TiersFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
Spin-hall assisted STT-RAM design and discussionFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
A demand-aware predictive dynamic bandwidth allocation mechanism for wireless network-on-chipFull-text access may be available. Sign in or learn about subscription options.pp. 1-8
[Front Matter]Full-text access may be available. Sign in or learn about subscription options.pp. 1-2
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