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2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID)

Jan. 6 2018 to Jan. 10 2018

Pune, India

Table of Contents

[Title page i]Freely available from IEEE.pp. i-i
[Title page iii]Freely available from IEEE.pp. iii-iii
[Copyright notice]Freely available from IEEE.pp. iv-iv
Table of contentsFreely available from IEEE.pp. v-xiii
Message from the General ChairFreely available from IEEE.pp. xiii-xiii
Message from the Technical Program Co-ChairsFreely available from IEEE.pp. xiv-xiv
Message from the Organizing Co-ChairsFreely available from IEEE.pp. xv-xv
Message from the Tutorial ChairFreely available from IEEE.pp. xvi-xvi
Message from the Steering Committee ChairFreely available from IEEE.pp. xvii-xvii
Message from the President, VLSI Society of IndiaFreely available from IEEE.pp. xviii-xviii
About the Cover from the Publication ChairFreely available from IEEE.pp. xix-xix
VLSI Design 2017 Conference Steering CommitteeFreely available from IEEE.pp. xx-xx
VLSI Design and ES 2018 Conference CommitteesFreely available from IEEE.pp. xxi-xxii
Technical Program CommitteeFreely available from IEEE.pp. xxiii-xxiii
ReviewersFreely available from IEEE.pp. xxiv-xxvii
VLSI Design Conference HistoryFreely available from IEEE.pp. xxviii-xxix
Embedded Systems Design Conference HistoryFreely available from IEEE.pp. xxx-xxx
Tutorial T1A: Assistive Technology for Visually Impaired: Embedded & Vision SolutionsFull-text access may be available. Sign in or learn about subscription options.pp. xxxi-xxxii
by M. Balakrishnan, Chetan Arora
Tutorial T1B: Emerging Computational Devices, Architectures and Computational ModelsFull-text access may be available. Sign in or learn about subscription options.pp. xxxiii-xxxiv
by Vijaykrishnan Narayanan, Arijit Raychowdhury, Sumeet Kumar Gupta
Tutorial T1C: High-Speed Serial Links: Architectures and Circuits for Clock and Data Recovery (CDR)Full-text access may be available. Sign in or learn about subscription options.pp. xxxv-xxxvi
by Saurabh Saxena, Nagendra Krishnapura
Tutorial T2A: Safe Autonomous Systems: Real-Time Error Detection and Correction in Safety-Critical Signal Processing and Control AlgorithmsFull-text access may be available. Sign in or learn about subscription options.pp. xxxvii-xxxviii
by Jacob Abraham, Abhijit Chatterjee
Tutorial T2B: Hardware Intellectual Property (IP) Security and Trust: Challenges and SolutionsFull-text access may be available. Sign in or learn about subscription options.pp. xxxix-xl
by Prabhat Mishra, Rajat Subhra Chakraborty
Tutorial T2C: Beyond von-Neumann Computing: Devices, Circuits, and ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. xli-xli
Tutorial T2D: Privacy Assurances in the Internet of Things (IoT) WorldFull-text access may be available. Sign in or learn about subscription options.pp. xlii-xlii
by Parameswaran Ramanathan
Tutorial T2E: Pre-Silicon Verification and Post-Silicon Validation: Dramatic Improvements through Disruptive InnovationsFull-text access may be available. Sign in or learn about subscription options.pp. xliii-xliv
Tutorial T2F: Silicon Nanophotonics for Future Manycore Chips: Opportunities and ChallengesFull-text access may be available. Sign in or learn about subscription options.pp. xlv-xlvi
by Sudeep Pasricha
Special Session: Design of Energy-Efficient and Reliable VLSI Systems: A Data-Driven PerspectiveFreely available from IEEE.pp. xlvii-l
Special Session: Advances in Power Management Integrated CircuitsFreely available from IEEE.pp. li-liii
A Systematic Approach to Determining the Weights of the Capacitors in the DAC of a Non-binary Redundant SAR ADCsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Uma Mukund Kulkarni, Chetan Parikh, Subhajit Sen
Mitigating Aperture Error in Pipelined ADCs Without a Front-end Sample-and-Hold AmplfierFull-text access may be available. Sign in or learn about subscription options.pp. 7-12
by Diego James, Abishek T. Kunnath, A. Purushothaman, Bibhu Datta Sahoo
A 12.5Gbps Transmitter for Multi-standard SERDES in 40nm Low Leakage CMOS ProcessFull-text access may be available. Sign in or learn about subscription options.pp. 13-18
by Biman Chattopadhyay, Sharath N. Bhat, Gopalkrishna Nayak, Ravi Mehta
An Ultra Low Power, 10-Bit Two-Step Flash ADC for Signal Processing ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 19-24
by Mahesh Kumar Adimulam, Amit Kapoor, Sreehari Veeramachaneni, M.B. Srinivas
Rescheduling of Power Gating Instructions for Reduction of In-rush CurrentFull-text access may be available. Sign in or learn about subscription options.pp. 25-30
by Sumanta Pyne
Dynamic Thermal Management by Using Task Migration in Conjunction with Frequency Scaling for Chip MultiprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 31-36
by Alankar V. Umdekar, Arijit Nath, Shirshendu Das, Hemangee K. Kapoor
Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal ComponentsFull-text access may be available. Sign in or learn about subscription options.pp. 37-42
by Sudipa Mandal, Aritra Hazra, Pallab Dasgupta, Rama Mohan Chunduri
DPFair Scheduling with Slowdown and SuspensionFull-text access may be available. Sign in or learn about subscription options.pp. 43-48
by Sanjay Moulik, Arnab Sarkar, Hemangee K. Kapoor
Fault-Tolerant Learning in Spiking Astrocyte-Neural Networks on FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 49-54
by Anju P. Johnson, Junxiu Liu, Alan G. Millard, Shvan Karim, Andy M. Tyrrell, Jim Harkin, Jon Timmis, Liam McDaid, David M. Halliday
FPGA Implementation of an Improved Watchdog Timer for Safety-Critical ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 55-60
by Ravi Krishnan Unni, P. Vijayanand, Y. Dilip
Image Compression Using 2D-Discrete Wavelet Transform on a Light Weight Reconfigurable HardwareFull-text access may be available. Sign in or learn about subscription options.pp. 61-66
by Nupur Jain, Mansi Singh, Biswajit Mishra
YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Using FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 67-72
by Khyamling Parane, Basavaraj Talawar, Prabhu Prasad B. M.
An Energy-Efficient Trusted FSM Design Technique to Thwart Fault Injection and Trojan AttacksFull-text access may be available. Sign in or learn about subscription options.pp. 73-78
by Vijaypal Singh Rathor, Bharat Garg, G. K. Sharma
Novel Variability Aware Path Selection for Self-Referencing Based Hardware Trojan DetectionFull-text access may be available. Sign in or learn about subscription options.pp. 79-84
by Vaikuntapu Ramakrishna, Lava Bhargava, Vineet Sahula
A Secure Low-Cost Edge Device Authentication Scheme for the Internet of ThingsFull-text access may be available. Sign in or learn about subscription options.pp. 85-90
by Ujjwal Guin, Adit Singh, Mahabubul Alam, Janice Cañedo, Anthony Skjellum
Hardware Trojan Detection Using ATPG and Model CheckingFull-text access may be available. Sign in or learn about subscription options.pp. 91-96
by Jonathan Cruz, Farimah Farahmandi, Alif Ahmed, Prabhat Mishra
Towards Single Pin Scan for Extremely Low Pin Count TestFull-text access may be available. Sign in or learn about subscription options.pp. 97-102
by Mudasir S. Kawoosa, Rajesh K. Mittal, Maheedhar Jalasuthram, Rubin A. Parekhji
Test-Time Reduction for Power-Aware 3D-SoCFull-text access may be available. Sign in or learn about subscription options.pp. 103-108
by Sabyasachee Banerjee, Subhashis Majumder, Bhargab B. Bhattacharya
Identification of Faulty TSVs in 3D IC During Pre-Bond TestingFull-text access may be available. Sign in or learn about subscription options.pp. 109-114
by Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri
Modeling & Analysis of Redundancy Based Fault Tolerance for Permanent Faults in Chip Multiprocessor CacheFull-text access may be available. Sign in or learn about subscription options.pp. 115-120
by Avishek Choudhury, Biplab K. Sikdar
Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways on Digital Microfluidic BiochipsFull-text access may be available. Sign in or learn about subscription options.pp. 121-126
by Oliver Keszocze, Mohamed Ibrahim, Robert Wille, Krishnendu Chakrabarty, Rolf Drechsler
Design Optimization at the Fluid-Level Synthesis for Safe and Low-Cost Droplet-Based Microfluidic BiochipsFull-text access may be available. Sign in or learn about subscription options.pp. 127-132
by Arpan Chakraborty, Piyali Datta, Rajat Kumar Pal
Hysteresis Free sub-60 mV/dec Subthreshold Swing in Junctionless MOSFETsFull-text access may be available. Sign in or learn about subscription options.pp. 133-138
by Manish Gupta, Abhinav Kranti
New Asymmetric Atomistic Model for the Analysis of Phase-Engineered MoS2-Gold Top ContactFull-text access may be available. Sign in or learn about subscription options.pp. 139-142
by Richa Chakravarty, Dipankar Saha, Santanu Mahapatra
Power Side Channel Resistance of RNS Secure LogicFull-text access may be available. Sign in or learn about subscription options.pp. 143-148
by Ravikumar Selvam, Akhilesh Tyagi
Positive Feedback Symmetric Adiabatic Logic Against Differential Power AttackFull-text access may be available. Sign in or learn about subscription options.pp. 149-154
by B.P. Bhuvana, Bhaaskaran V.S. Kanchana
Online Detection and Reactive Countermeasure for Leakage from BPU Using TVLAFull-text access may be available. Sign in or learn about subscription options.pp. 155-160
by Sarani Bhattacharya, Shivam Bhasin, Debdeep Mukhopadhyay
Secure Neural Circuits to Mitigate Correlation Power Analysis on SHA-3 Hash FunctionFull-text access may be available. Sign in or learn about subscription options.pp. 161-166
by James Thesing, Dhireesha Kudithipudi
A Novel Zero Blind Zone Phase Frequency Detector for Fast Acquisition in Phase Locked LoopsFull-text access may be available. Sign in or learn about subscription options.pp. 167-170
by Sucheth S. Kuncham, Manasa Gadiyar, Din K. Sushmitha, Kiran Kumar Lad, Tonse Laxminidhi
A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 171-176
by R.R. Manikandan, Vipul Singhal, Rajat Chauhan, Vinod Menezes, Mahesh Mehendale
A Quadrature-Phase Voltage Controlled Oscillator for Offset Phase and Frequency CompensationFull-text access may be available. Sign in or learn about subscription options.pp. 177-180
by Pragya Maheshwari, Pavan Kumar Sadhu, Mukesh Deharia, Nandakumar Nambath, Shalabh Gupta
CMOS Oscillator Having Stable Frequency with Process, Temperature and Voltage VariationFull-text access may be available. Sign in or learn about subscription options.pp. 181-185
by Vikas Rana
High Speed FPGA Fabric Aware CSD Recoding with Run-Time Support for Fault LocalizationFull-text access may be available. Sign in or learn about subscription options.pp. 186-191
by Ayan Palchaudhuri, Anindya Sundar Dhar
A Low-Power Circuit for Adaptive Dynamic ProgrammingFull-text access may be available. Sign in or learn about subscription options.pp. 192-197
by Nan Zheng, Pinaki Mazumder
Low Power Configurable Readout Integrated Circuit for Infrared DetectorFull-text access may be available. Sign in or learn about subscription options.pp. 198-203
by Hari Shanker Gupta, Pranoy Datta, Maryam Shojaei Baghini, A.S. Kiran Kumar, Dinesh K. Sharma
Feedback Biasing Based Adjustable Gain Ultrasound Preamplifier for CMUTs in 45nm CMOSFull-text access may be available. Sign in or learn about subscription options.pp. 204-207
by Linga Reddy Cenkeramaddi
A High Efficiency Body Injected Differential Power Amplifier at 2.4GHz for Low Power ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 208-213
by Mannem Naga Sasikanth, Tarun Kanti Bhattacharyya
A Novel Low Power G m-C Continuous-Time Analog Filter with Wide Tuning RangeFull-text access may be available. Sign in or learn about subscription options.pp. 214-219
by P.S. Veerendranath, M.H. Vasantha, Y.B. Nithin Kumar, Edoardo Bonizzoni
0.36 nJ/bit MedRadio Band OOK Transmitter for Wearable Healthcare ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 220-225
by Abhishek Srivastava, Maryam Shojaei Baghini
Time-Based PWM Controller for Fully Integrated High Speed Switching DC-DC Converters — An Alternative to Conventional Analog and Digital ControllersFull-text access may be available. Sign in or learn about subscription options.pp. 226-231
by Qadeer A. Khan, Seong-Joong Kim, Pavan Kumar Hanumolu
Flipped Voltage Follower Based Low Dropout (LDO) Voltage Regulators: A Tutorial OverviewFull-text access may be available. Sign in or learn about subscription options.pp. 232-237
by Punith R. Surkanti, Annajirao Garimella, Paul M. Furth
Overcoming Energy and Reliability Challenges for IoT and Mobile Devices with Data AnalyticsFull-text access may be available. Sign in or learn about subscription options.pp. 238-243
by Sudeep Pasricha
Data-Driven Resiliency Solutions for Boards and SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 244-249
by Shi Jin, Krishnendu Chakrabarty
Single-Error Hardened and Multiple-Error Tolerant Guarded Dual Modular Redundancy TechniqueFull-text access may be available. Sign in or learn about subscription options.pp. 250-255
by Sai Aparna Aketi, Joycee Mekie, Hemal Shah
Impact of Device Aging on Early Mode Failures in Pulsed LatchesFull-text access may be available. Sign in or learn about subscription options.pp. 256-260
by Ankur Shukla, Rahul M. Rao, James D. Warnock
A 0.6V Retention VMIN Ultra-Low Leakage High Density 6T SRAM in 40nm CMOS Technology Using Adaptive Source BiasFull-text access may be available. Sign in or learn about subscription options.pp. 261-265
by Ashish Kumar, G.S. Visweswaran
A 7-Nm Dual Port 8T SRAM with Duplicated Inter-Port Write Data to Mitigate Write DisturbanceFull-text access may be available. Sign in or learn about subscription options.pp. 266-270
by M. Sultan M. Siddiqui, Sumit Srivastav, Dattatray Ramrao Wanjul, Manankumar Suthar, Sudhir Kumar
An Efficient VLSI Architecture for Convolution Based DWT Using MACFull-text access may be available. Sign in or learn about subscription options.pp. 271-276
by Mohamed Asan Basiri M., Noor Mahammad Sk
Hardware-Efficient and Wide-Band Frequency-Domain Energy Detector for Cognitive-Radio Wireless NetworkFull-text access may be available. Sign in or learn about subscription options.pp. 277-282
by Mahesh S. Murty, Rahul Shrestha
Area and Power Efficient VLSI Architecture of Distributed Arithmetic Based LMS Adaptive FilterFull-text access may be available. Sign in or learn about subscription options.pp. 283-288
by Mohd. Tasleem Khan, Shaik Rafi Ahamed
Novel High Speed Vedic Multiplier Proposal Incorporating Adder Based on Quaternary Signed Digit Number SystemFull-text access may be available. Sign in or learn about subscription options.pp. 289-294
by Preyesh Dalmia, Vikas, Abhinav Parashar, Akshi Tomar, Neeta Pandey
Design Space Exploration of an Execution-Driven Functional Simulation MethodologyFull-text access may be available. Sign in or learn about subscription options.pp. 295-300
by Ipsita Biswas Mahapatra, Utkarsh Agarwal, Chandrashekhar Azad, S. K. Nandy
A Practical Methodology to Compress Technology Libraries Using Recursive Polynomial RepresentationFull-text access may be available. Sign in or learn about subscription options.pp. 301-306
by Sneh Saurabh, Priyanka Mittal
CLRFrame: An Analysis Framework for Designing Cross-Layer Reliability in Embedded SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 307-312
by Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
Computing Fréchet Distance Metric Based L-Shape Tile Decomposition for E-Beam LithographyFull-text access may be available. Sign in or learn about subscription options.pp. 313-318
by Arindam Sinharay, Pranab Roy, Hafizur Rahaman
2nd Order Sallen Key Switched Capacitor LPF with N-type TransistorsFull-text access may be available. Sign in or learn about subscription options.pp. 319-324
by Kamal Chapagai, Pydi Bahubalindruni, Nishtha
Pseudo-Continuous Output Switched-Capacitor Amplifier for Rail-to-Rail Current Sensing ApplicationFull-text access may be available. Sign in or learn about subscription options.pp. 325-328
by Anjali Gopinath, Ravi Kumar Adusumalli, Rohit Ranganathan, Arya S.
Design Considerations of a Sub-50 Mu-W Receiver Front-end for Implantable Devices in MedRadio BandFull-text access may be available. Sign in or learn about subscription options.pp. 329-334
by Gregory Chang, Shovan Maity, Baibhab Chatterjee, Shreyas Sen
A 0.6 mW 1.6 dB Noise Figure Inductorless Shunt Feedback Wideband LNA With Gm Enhancement and Current Reuse in 65 nm CMOSFull-text access may be available. Sign in or learn about subscription options.pp. 335-340
by Narendra Nath Ghosh, Prakash Kumar Lenka, SriHarsa Vardan G, Ashudeb Dutta
An NMOS Low Drop-out Voltage Regulator with -17dB Wide-Band Power Supply Rejection for SerDes in 22FDXFull-text access may be available. Sign in or learn about subscription options.pp. 341-346
by Nitin Bansal, Rahul Gupta
Single Inductor Dual Output Buck Converter for Low Power Applications and Its Stability AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 347-352
by Sowmya Sankaranarayanan, Kulkarni Chaitali Vinod, Aswanth Sreekumar, Tonse Laxminidhi, Vipul Singhal, Rajat Chauhan
A 0.29ps FOM Fast Transient any Cap Stable LVR in 28FDSOIFull-text access may be available. Sign in or learn about subscription options.pp. 353-357
by Nitin Bansal, Saurabh Kumar Singh, Hemant Shukla, Madhvi Sharma
A High Performance Gated Voltage Level Translator with Integrated MultiplexerFull-text access may be available. Sign in or learn about subscription options.pp. 358-361
by B.S. Dharshak, Rahul M. Rao
Accelerating Hash Computations Through Efficient Instruction-Set CustomisationFull-text access may be available. Sign in or learn about subscription options.pp. 362-367
by Mayuran Sivanesan, Anupam Chattopadhyay, Ronak Bajaj
Lightweight Forth Programmable NoCsFull-text access may be available. Sign in or learn about subscription options.pp. 368-373
by Vinay B. Y. Kumar, Deval Shah, Mandar Datar, Sachin B. Patkar
An Adaptive Deflection Router with Dual Injection and Ejection Units for Mesh NoCsFull-text access may be available. Sign in or learn about subscription options.pp. 374-379
by John Jose, Abhijit Das
Towards Near Data Processing of Convolutional Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 380-385
by Palash Das, Shivam Lakhotia, Prabodh Shetty, Hemangee K. Kapoor
PPU: Privacy-Aware Purchasing Unit for Residential Customers in Smart Electric GridsFull-text access may be available. Sign in or learn about subscription options.pp. 386-391
by Amrita Roy Chowdhury, Parameswaran Ramanathan
A High-Performance and Area-Efficient VLSI Architecture for the PRESENT Lightweight CipherFull-text access may be available. Sign in or learn about subscription options.pp. 392-397
by Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar
Security Vulnerabilities of Unmanned Aerial Vehicles and Countermeasures: An Experimental StudyFull-text access may be available. Sign in or learn about subscription options.pp. 398-403
by Vishal Dey, Vikramkumar Pudi, Anupam Chattopadhyay, Yuval Elovici
AMS-Miner: Mining AMS Assertions Using Interval ArithmeticFull-text access may be available. Sign in or learn about subscription options.pp. 404-409
by Antonio Anastasio Bruto da Costa, Shriya Dharade, Sudipa Mandal, Pallab Dasgupta
ELURA: A Methodology for Post-Silicon Gate-Level Error Localization Using Regression AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 410-415
by Ankit Jindal, Binod Kumar, Kanad Basu, Masahiro Fujita
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