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2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID)

Feb. 26 2022 to March 2 2022

Bangalore, India

ISBN: 978-1-6654-8505-0

Table of Contents

Title Page iFreely available from IEEE.pp. 1-1
Title Page iiiFreely available from IEEE.pp. 3-3
Copyright PageFreely available from IEEE.pp. 4-4
Table of ContentsFreely available from IEEE.pp. 5-12
Message from the General Co-ChairsFreely available from IEEE.pp. 13-13
Message from the Organizing ChairsFreely available from IEEE.pp. 14-14
Message from the Technical Program ChairsFreely available from IEEE.pp. 15-15
Message from the Steering Committee ChairsFreely available from IEEE.pp. 16-16
Message from the Publication ChairsFreely available from IEEE.pp. 17-17
VLSI Design Conference Steering CommitteeFreely available from IEEE.pp. 18-18
VLSiD & ES 2022 Organizing CommitteeFreely available from IEEE.pp. 19-27
Technical Program Committee MembersFreely available from IEEE.pp. 28-32
Best Paper AwardsFreely available from IEEE.pp. 33-33
A 5-Gb/s PAM4 Voltage Mode Transmitter with Current Mode Continuous Time Linear EqualizerFull-text access may be available. Sign in or learn about subscription options.pp. 1-5
by Shraman Mukherjee, Sumantra Seth, Saurabh Saxena
A 0.009mm2, 0-230mA Wide-range Load Current Output Capacitor-less Low Dropout Regulator for High Bandwidth Memory parallel IOsFull-text access may be available. Sign in or learn about subscription options.pp. 6-10
by Javed S Gaggatur, Miryala Chandrashekhar, Komal Deshmukh
A PC based Ultrasound back-end signal processor using Intel® Performance PrimitivesFull-text access may be available. Sign in or learn about subscription options.pp. 11-15
by Jayaraj U Kidav, Akula Sri Rama Pavan, M Rajesh, Navin Kumar W
Power and Energy Safe Real-Time Multi-Core Task SchedulingFull-text access may be available. Sign in or learn about subscription options.pp. 16-21
by Kalyan Baital, Amlan Chakrabarti, Biswadeep Chatterjee, Stefan Holst, Xiaoqing Wen
Equivalence Checking of Non-Binary Combinational NetlistsFull-text access may be available. Sign in or learn about subscription options.pp. 22-27
by Aditi Singh
Dynamic Variable Ordering during Algebraic Backward Rewriting for Formal Verification of MultipliersFull-text access may be available. Sign in or learn about subscription options.pp. 28-32
by Jitendra Kumar, Asutosh Srivastava
A 180o Phase Shift Biasing Technique for Realizing High PSRR in Low Power Temperature SensorsFull-text access may be available. Sign in or learn about subscription options.pp. 33-38
by Arpan Jain, Abhishek Pullela, Ashfakh Ali, Zia Abbas
A Real Time Multi-Bit DAC Mismatch Estimation & Correction Technique For Wideband Continuous Time Sigma Delta ModulatorsFull-text access may be available. Sign in or learn about subscription options.pp. 39-43
by Ankur Bal, Sharad Gupta, Rupesh Singh
A 10 Gb/s On-chip Jitter Measurement Circuit Based on Transition Region Scanning MethodFull-text access may be available. Sign in or learn about subscription options.pp. 44-49
by Santunu Sarangi, Indranil Som, T K Bhattacharyya
Customizable Head-mounted Device for Detection of Eye Disorders using Virtual RealityFull-text access may be available. Sign in or learn about subscription options.pp. 50-55
by Y Pawankumar Gururaj, Sai Anirudh Karre, Raghav Mittal, Y Raghu Reddy, Syed Azeemuddin
Energy Aware Dynamic Load Balancer for Embedded Multi-core SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 56-61
by Sachin Ramesh Pundkar, Surajit Pradeep Karmakar, Samir Kumar Mishra, Surendra Singh, Tushar Vrind
Energy Optimized Non-preemptive Scheduling of Real-Time Tasks with Precedence and Reliability ConstraintsFull-text access may be available. Sign in or learn about subscription options.pp. 62-67
by Niraj Kumar, Arijit Mondal
MLIR: Machine Learning based IR Drop Prediction on ECO Revised Design for Faster ConvergenceFull-text access may be available. Sign in or learn about subscription options.pp. 68-73
by Santanu Kundu, Manoranjan Prasad, Sashank Nishad, Sandeep Nachireddy, Harikrishnan K
NanoLeak: A Fast Analytical Green’s Function-based Leakage-aware Thermal SimulatorFull-text access may be available. Sign in or learn about subscription options.pp. 74-79
by Anjali Agrawal, Smruti R. Sarangi
Automated Debugger for Optimum Physical Clock Structure Targeting Minimal LatencyFull-text access may be available. Sign in or learn about subscription options.pp. 80-85
by Rushabh Shah, Krishna Agrawal, G Anjaneyulu, Vishnu Bhaskari
Hardware Implementation of Network Interface Architecture for RISC-V based NoC-MPSoC FrameworkFull-text access may be available. Sign in or learn about subscription options.pp. 86-91
by M K Aparna Nair, Police Manoj Kumar Reddy, Y.L. Abijith, Venkatesh Rajagopalan, J Soumya
Scalable Hybrid Cache Coherence Using Emerging Links for Chiplet ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 92-97
by Sri Harsha Gade, Mitali Sinha, Madhur Kumar, Sujay Deb
Novel Circuit Architecture for configurable eDP and MIPI DPHY IOFull-text access may be available. Sign in or learn about subscription options.pp. 98-101
by Sunil Kumar C R, Aruna Kumar, Sanjib Basu
MAPPARAT: A Resource Constrained FPGA-Based Accelerator for Sparse-Dense Matrix MultiplicationFull-text access may be available. Sign in or learn about subscription options.pp. 102-107
by M. R. Ashuthosh, Santosh Krishna, Vishvas Sudarshan, Srinivasan Subramaniyan, Madhura Purnaprajna
An Attack Resilient PUF-based Authentication Mechanism for Distributed SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 108-113
by Mohammad Ebrahimabadi, Mohamed Younis, Wassila Lalouani, Naghmeh Karimi
Static Malware Analysis using ELF features for Linux based IoT devicesFull-text access may be available. Sign in or learn about subscription options.pp. 114-119
by Akshara Ravi, Vivek Chaturvedi
HeapSafe: Securing Unprotected Heaps in RISC-VFull-text access may be available. Sign in or learn about subscription options.pp. 120-125
by Asmit De, Swaroop Ghosh
SEVA: Structural Analysis based Security Evaluation of Sequential LockingFull-text access may be available. Sign in or learn about subscription options.pp. 126-131
by Abdulrahman Alaql, Aritra Dasgupta, Md Moshiur Rahman, Swarup Bhunia
Tracking Coverage Artefacts for Periodic Signals using Sequence-based AbstractionsFull-text access may be available. Sign in or learn about subscription options.pp. 132-137
by Ayan Chakraborty, Sayandeep Sanyal, Pallab Dasgupta, Aritra Hazra, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian
Stitch-avoiding Global Routing for Multiple E-Beam LithographyFull-text access may be available. Sign in or learn about subscription options.pp. 138-143
by Kritanta Saha, Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay
Robust Estimation of FPGA Resources and Performance from CNN ModelsFull-text access may be available. Sign in or learn about subscription options.pp. 144-149
by Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia
Identifying Combination of Defects and Unknown Defects on Semiconductor Wafers using Deep Learning and Hierarchical ReclusteringFull-text access may be available. Sign in or learn about subscription options.pp. 150-155
by Ankit Gupta, Adrita Barari, Damini Damini, Keerthi Kiran Jagannathachar, Seungwoo Lee, Janghoon Oh, Jungha Kim, Minjoo Kim
An Architectural support for Digital Microfluidic based Hot-Spot free ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 156-161
by Sumanta Pyne
Hardware Accelerator for Capsule Network based Reinforcement LearningFull-text access may be available. Sign in or learn about subscription options.pp. 162-167
by Dola Ram, Suraj Panwar, Kuruvilla Varghese
SCENIC: An Area and Energy-Efficient CNN-based Hardware Accelerator for Discernable Classification of Brain Pathologies using MRIFull-text access may be available. Sign in or learn about subscription options.pp. 168-173
by Bodepu Sai Tirumala Naidu, Shreya Biswas, Rounak Chatterjee, Sayak Mandal, Srijan Pratihar, Ayan Chatterjee, Arnab Raha, Amitava Mukherjee, Janet Paluh
Mixed-8T: Energy-Efficient Configurable Mixed-VT SRAM Design Techniques for Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 174-179
by Neelam Surana, Pramod Kumar Bharti, Bachu Varun Tej, Joycee Mekie
Towards a Fully Autonomous UAV Controller for Moving Platform Detection and LandingFull-text access may be available. Sign in or learn about subscription options.pp. 180-185
by Michalis Piponidis, Panayiotis Aristodemou, Theocharis Theocharides
A 2.75-2.94 GHz Voltage Controlled Oscillator with Low Gain Variation for Quantum Sensing ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 186-191
by Adithya Sunil Edakkadan, Kuntal Desai, Abhishek Srivastava
A Low Phase Noise 30 GHz Oscillator Topology for Resonant-Fin-Transistors Based High-Q On-chip Resonators in 14 nm TechnologyFull-text access may be available. Sign in or learn about subscription options.pp. 192-197
by Abhishek Srivastava, Baibhab Chatterjee, Dana Weinstein, Shreyas Sen
Design Methodology of Low Phase Noise mmWave Oscillator with Partial Cancellation of Static Capacitance of High-Q On-chip MEMS ResonatorFull-text access may be available. Sign in or learn about subscription options.pp. 198-203
by Ashish Papreja, Sresthavadhani Mantha, Abhishek Srivastava
An event driven approximate bio-electrical model generating surface electromyography RMS featuresFull-text access may be available. Sign in or learn about subscription options.pp. 204-209
by K Vinay, Vikas Vazhayil, Madhav Rao
Approximate Adders for Deep Neural Network AcceleratorsFull-text access may be available. Sign in or learn about subscription options.pp. 210-215
by S Raghuram, N Shashank
40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention ModeFull-text access may be available. Sign in or learn about subscription options.pp. 216-221
by Kedar Janardan Dhori, Promod Kumar, Christophe Lecocq, Pascal Urard, Olivier Callen, Florian Cacho, Maryline Parra, Prashant Pandey, Daniel Noblet
Low Power and Area Efficient Approximate 2D-DCT Architecture for Wireless Capsule EndoscopyFull-text access may be available. Sign in or learn about subscription options.pp. 222-227
by Vaibhavi Solanki, Rahul Ranjan Kumar, Praveen Ghagare, A. D. Darji
Retention Problem Free High Density 4T SRAM cell with Adaptive Body Bias in 18nm FD-SOIFull-text access may be available. Sign in or learn about subscription options.pp. 228-233
by Chandan Kumar, Rahul Kumar, Anuj Grover, Shouri Chatterjee, Kedar Janardan Dhori, Harsh Rawat
Criticality based Reliability from Rowhammer Attacks in Multi-User-Multi-FPGA PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 234-239
by Krishnendu Guha, Amlan Chakrabarti
Pulse-width Modulation Technique for Generation of Multiple Analog Voltages for On-chip CalibrationFull-text access may be available. Sign in or learn about subscription options.pp. 240-245
by Rajath Vasudevamurthy
Easily-Verifiable Design of Non-Scan Sequential Machines for Conformance CheckingFull-text access may be available. Sign in or learn about subscription options.pp. 246-251
by Habibur Rahaman, Santanu Chattopadhyay, Indranil Sengupta, Debesh K. Das, Bhargab B. Bhattacharya
Parasitic Interactions with Intermediate Substrates and Methods to Mitigate their Impact: A Case Study in Voltage Protection ICsFull-text access may be available. Sign in or learn about subscription options.pp. 252-256
by Srinivasa Prasad Soundararajan, Harry Gee, Adam Whitworth
A High Voltage Level Shifter for Automotive Buck Converter with a Fast Transient ResponseFull-text access may be available. Sign in or learn about subscription options.pp. 257-262
by Anupama Deo, Ashis Maity, Amit Patra
A Soft RISC-V Vector Processor for Edge-AIFull-text access may be available. Sign in or learn about subscription options.pp. 263-268
by V. Naveen Chander, Kuruvilla Varghese
Design of 8-bit Dadda Multiplier using Gate Level Approximate 4:2 CompressorFull-text access may be available. Sign in or learn about subscription options.pp. 269-274
by Kattekola Naresh, Y. Padma Sai, Shubhankar Majumdar
DeepQMLP: A Scalable Quantum-Classical Hybrid Deep Neural Network Architecture for ClassificationFull-text access may be available. Sign in or learn about subscription options.pp. 275-280
by Mahabubul Alam, Swaroop Ghosh
Image Completion using a Sparse Probabilistic Spin Logic NetworkFull-text access may be available. Sign in or learn about subscription options.pp. 281-286
by Amina Haroon, Sneh Saurabh
Threshold Voltage Modeling of Negative Capacitance Double Gate TFETFull-text access may be available. Sign in or learn about subscription options.pp. 287-291
by U S Shikha, Rekha K James, Anju Pradeep, Sumi Baby, Jobymol Jacob
Design optimization Using Symmetric/Asymmetric Spacer for 14 nm Multi-Fin Tri-gate Fin-FET for Mid-Band 5G ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 292-296
by Jyoti Patel, Shashank Banchhor, Surila Guglani, Avirup Dasgupta, Sourajeet Roy, Anand Bulusu, Sudeb Dasgupta
How Good Silicon Oxide-based Memristor Can be?Full-text access may be available. Sign in or learn about subscription options.pp. 297-302
by Mani Shankar Yadav, Avinash Kumar Gupta, Kanupriya Varshney, Brajesh Rawat
Role of Interface Trap Charges in the Performance of Monolayer and Bilayer MoS2-based Field-Effect TransistorsFull-text access may be available. Sign in or learn about subscription options.pp. 303-308
by Akhilesh Rawat, Anjali Goel, Brajesh Rawat
Author IndexFreely available from IEEE.pp. 309-311
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