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2025 38th International Conference on VLSI Design and 2025 24th International Conference on Embedded Systems (VLSID)

Jan. 4 2025 to Jan. 8 2025

Bangalore, India

ISBN: 979-8-3315-2244-5

Table of Contents

Title PageFreely available from IEEE.pp. 1-1
Title PageFreely available from IEEE.pp. 1-1
Copyright PageFreely available from IEEE.pp. 1-1
Table of ContentsFreely available from IEEE.pp. v-xvi
VLSI Design Conference HistoryFreely available from IEEE.pp. xviii-xix
Message from the Steering Committee Chair: VLSID 2025Freely available from IEEE.pp. xx-xx
Message from the General Chairs: VLSID 2025Freely available from IEEE.pp. xxi-xxiii
Message from the Technical Program Chairs: VLSID 2025Freely available from IEEE.pp. xxiv-xxiv
Message from the IEEE Liaisons and Publication Chairs: VLSID 2025Freely available from IEEE.pp. xxv-xxv
Committees: VLSID 2025Freely available from IEEE.pp. xxvi-xxvii
Technical Program Committee: VLSID 2025Freely available from IEEE.pp. xxviii-xxviii
List of ReviewersFreely available from IEEE.pp. xxix-xxxv
MERGERS: Multi-Access Edge Resource Governance for Real-Time SaaS SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Aakashjit Bhattacharya, Arnab Sarkar, Ansuman Banerjee
PrOFraC: Property Ordering and Frame Clause Reuse for Multi-Property VerificationFull-text access may be available. Sign in or learn about subscription options.pp. 7-12
by Sourav Das, Aritra Hazra, Pallab Dasgupta, Himanshu Jain, Sudipta Kundu
Bidirectional Spiking Neuron Based Dual-Mode Signal Acquisition Front-End SystemFull-text access may be available. Sign in or learn about subscription options.pp. 13-18
by Tamal Chowdhury, Pradip Mandal
Lichen: Leveraging Coupled HeterogeneityFull-text access may be available. Sign in or learn about subscription options.pp. 19-24
by Prakhar Diwan, Nirmal Kumar Boran, Virendra Singh
Physical Synthesis Optimization Prediction Using Machine LearningFull-text access may be available. Sign in or learn about subscription options.pp. 25-30
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Enhancing Reliability and Energy Efficiency in Network-on-Chip Architectures through Hybrid Sorting Algorithm-Based Core MappingFull-text access may be available. Sign in or learn about subscription options.pp. 31-36
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True-PolyTronik: Securing Circuits Against Laser Logic State Imaging Attack Using RFETFull-text access may be available. Sign in or learn about subscription options.pp. 37-42
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FARAD: Automated Formal Verification of Approximate Restoring Array DividersFull-text access may be available. Sign in or learn about subscription options.pp. 43-48
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CRIS-b: A High-Speed Unified Modulo Reduction Algorithm and Hardware Architecture for CRYSTALS-KyberFull-text access may be available. Sign in or learn about subscription options.pp. 49-54
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hbcLock: Encrypted RF Communication Utilizing Body-Coupled Keys for the Internet of BodiesFull-text access may be available. Sign in or learn about subscription options.pp. 55-60
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Optimal Respiratory Rate Estimation with mmWave Sensing Using PYNQ System-on-Chip PlatformFull-text access may be available. Sign in or learn about subscription options.pp. 67-72
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Interconnect Optimization for Timing and Power [IOTAP]Full-text access may be available. Sign in or learn about subscription options.pp. 79-84
by Sourav Saha, Sagar Rana, Keshav Patil, Nagamaheswar Harivelam Srinivas Gari
A Study on Efficiency Improvements of DNN Accelerators via Denormalized Arithmetic EliminationFull-text access may be available. Sign in or learn about subscription options.pp. 85-90
by Alexander Kharitonov, Sandip Kundu
Optimizing Bandwidth Utilization Through Word Based Compression in Main MemoriesFull-text access may be available. Sign in or learn about subscription options.pp. 91-96
by Aswathy N S, Harsh Verma, Hemangee K. Kapoor
Accelerating U-Net: A Patchwise Memory Optimization Approach for Image SegmentationFull-text access may be available. Sign in or learn about subscription options.pp. 97-102
by Chaitanya Modiboyina, Syam Babu Gundumilli, Soumya Kanti Ghosh, Indrajit Chakrabarti
Pin Efficient Tri-Level Based Inductive Coupling Transceiver for 3D ICsFull-text access may be available. Sign in or learn about subscription options.pp. 103-108
by Soumojit Bakshi, V K Surya, Nijwm Wary
ABMF: Adaptive Bonsai Merkle Forests for Efficient Integrity Verification in Secure Persistent MemoriesFull-text access may be available. Sign in or learn about subscription options.pp. 109-114
by Hemangee K. Kapoor, Kartikay Bhardwaj
A 0.27-THz Frequency Multiplier Chain Using Harmonic Mixing with Multiplication of × 18 in 65-nm CMOSFull-text access may be available. Sign in or learn about subscription options.pp. 115-120
by Bollam Shiva Prasad, Mahima Arrawatia
NSGA-RM: NSGA-II Evolved Performance Optimized Non-Homogeneous Recursive Polynomial Multiplier ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 121-126
by Daksh Sharma, Vasanthi D R, Sanampudi Gopala Krishna Reddy, Madhav Rao
Optimizing Multipliers: An Energy-Efficient Design Using a Novel 3:2 CompressorFull-text access may be available. Sign in or learn about subscription options.pp. 127-132
by L. Hemanth Krishna, Sreehari Veeramachaneni, Srinivasu Bodapati, BhaskaraRao Jammu, Noor Mahammad Sk
TOGGLE6.0: A 4.8Gbps Next Generation Area and Power Efficient Transceiver for Flash Memory InterfaceFull-text access may be available. Sign in or learn about subscription options.pp. 133-138
by Hari Vijay Venkatanarayanan, Rustum Prasad Sahu, Maheswara Alamuru, Ergam Reddy Battini, Syed Mohammed Haroon, Saurav Suman, Deepika Mallela, Sanjeeb Kumar Ghosh, Billy Koo
SHAKTI: Securing Hardware IPs by Cascade Gated Multiplexer-Based Logic ObfuscationFull-text access may be available. Sign in or learn about subscription options.pp. 139-144
by Jugal Gandhi, Nikhil Handa, Abhay Nayak, Diksha Shekhawat, M. Santosh, Jaya Dofe, Jai Gopal Pandey
An SRAM-Based Multi-Operand Architecture Implementing Multi-Bit Boolean Functions Using in-Memory Periphery ComputingFull-text access may be available. Sign in or learn about subscription options.pp. 145-150
by Dhayan Dhananjaya Senanayake, Priyanshu Tyagi, Sparsh Mittal, Rekha Singhal
Design of Manchester Carry Chain Hybrid Adder for MASH 1-1-1 Delta Sigma Modulator for Fractional-N Frequency SynthesizersFull-text access may be available. Sign in or learn about subscription options.pp. 151-156
by Abhinav S, Busam Karthikeya, Ishan Acharyya, Anushka Tripathi, Abhishek Srivastava
Boosting System-on-Chip Performance Through AI-Assisted Optimization Using Compositional Neural NetworksFull-text access may be available. Sign in or learn about subscription options.pp. 157-162
by Priyatam Roy, Surinder Sood
BMC Engine Sequencing with Graph Neural Network Embeddings of Hardware CircuitsFull-text access may be available. Sign in or learn about subscription options.pp. 163-168
by Soumik Guha Roy, Adriz Chanda, Prateek Ganguli, Sumana Ghosh, Ansuman Banerjee, Raj Kumar Gajavelly, Sudhakar Surendran
A Constructive High-Speed Crypto-mining Approach with Dual SHA-256 on an FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 169-174
by Velamala Pavan Kumar, Aravindhan Alagarsamy
A Wide Dynamic Range Differential Drive CMOS Rectifier for μWatts RF Energy Harvesting SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 175-179
by Chaya Hegde, Arun Mohan, Saroj Mondal, Roy P. Paily
A 0.75mm2 407μW Real-Time Speech Audio Denoiser with Quantized Cascaded Redundant Convolutional Encoder-Decoder for Wearable IoT DevicesFull-text access may be available. Sign in or learn about subscription options.pp. 180-185
by Dimple Vijay Kochar, Maitreyi Ashok, Anantha P. Chandrakasan
N-Well Patterning of P-Type CMOS Substrate for Improving Quality Factor of on-Chip Inductors at Millimeter Wave FrequenciesFull-text access may be available. Sign in or learn about subscription options.pp. 186-190
by Subbareddy Chavva, Immanuel Raja
Serialized Control Interface ASIC for Distributed Controllers of Space-Borne RADARFull-text access may be available. Sign in or learn about subscription options.pp. 191-196
by Chiragkumar B. Patel, Ajay Kumar Singh, Himanshu N. Patel, B Saravana Kumar
DuRTL - Information Flow Analysis Tool for Register Transfer Level Hardware DesignsFull-text access may be available. Sign in or learn about subscription options.pp. 197-202
by Lutz Schammer, Gianluca Martino, Goerschwin Fey
An Innovative Solution to Improve Ultra Low Voltage Writability and Leakage in GPU SRAMsFull-text access may be available. Sign in or learn about subscription options.pp. 203-207
by Deepesh Gujjar, Sanatkumar Upadhye, Sandipan Sinha, Taha Khursheed, Jigar Patel, Jaswinder Sidhu, Manish Trivedi, Sagar Abachi
Hardware Implementation of Blind Decoding of Downlink Control Information for 5GFull-text access may be available. Sign in or learn about subscription options.pp. 208-213
by Y Anu rajarajeswari, Nitin Chandrachoodan, Anji Babu Vadapalli, J Klutto Milleth
Startup Circuit for Relaxation Oscillators with Low Functional Current and Minimal AreaFull-text access may be available. Sign in or learn about subscription options.pp. 214-218
by Anubhav Srivastava, Sadique Mohammad Iqbal, Divya Tripathi, Saurabh Goyal
Effective Memory Management and Sparse Aware Cache for Row-Wise Sparse CNNsFull-text access may be available. Sign in or learn about subscription options.pp. 219-224
by MC Balasubramaniam, Basava Naga Girish Koneru, Nitin Chandrachoodan
FPUGen: A FrameWork to Generate Custom Floating Point FMA Accelerators on FPGAsFull-text access may be available. Sign in or learn about subscription options.pp. 225-230
by Himanshu Rai, Aishwarya Sridhar, Wolfgang Ecker, Nanditha Rao
Advancing Rehabilitation Through Low Weight Hand Assistive System: Design and Impact AnalysisFull-text access may be available. Sign in or learn about subscription options.pp. 231-236
by Kushagra Singh, Kafil Abbas Momin, Anshul V Patil, Madhav Rao
Advancing Neural Network Performance with Probabilistic Computing for ReLU FunctionFull-text access may be available. Sign in or learn about subscription options.pp. 237-242
by Amit Singh, Amit Kumar Jangid, B. Srinivasu
E-DOSA: Efficient Dataflow for Optimising SNN AccelerationFull-text access may be available. Sign in or learn about subscription options.pp. 243-248
by Hemangee K. Kapoor, Imlijungla Longchar, Binayak Behera
Layer-Specific Hardware Pooling Designs for CNN AcceleratorsFull-text access may be available. Sign in or learn about subscription options.pp. 249-254
by Vinay Rayapati, Mahati Basavaraju, Madhav Rao
TCAD Based Study of String Current Variability in 3D NAND Flash MemoryFull-text access may be available. Sign in or learn about subscription options.pp. 255-260
by Mrinmoy Mahapatra, Prathamesh Ganesh Kekarjawlekar, Akshay K.
Early Bug Detector – A Verification Methodology for DFD-SoC RTL ParametersFull-text access may be available. Sign in or learn about subscription options.pp. 261-265
by C Bhagyalakshmi, Madhav Lekkala, Maneesh Pandey
PAF-Enc: Position Affine Encoding to Reduce Bit-Flips in Non-Volatile Main MemoriesFull-text access may be available. Sign in or learn about subscription options.pp. 266-271
by Swati Upadhyay, Hemangee K. Kapoor
A Tug-of-War Between Static and Dynamic Memory in Intel SGXFull-text access may be available. Sign in or learn about subscription options.pp. 272-277
by Sandeep Kumar, Abhisek Panda, Advait Nerlikar, Smruti R. Sarangi
Multi-Object Detection Through Meta-Training in Resource-Constrained UAV-Based Surveillance ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 278-283
by Abhishek Yadav, Vyom Kumar Gupta, Kethireddy Harshith Reddy, Masahiro Fujita, Binod Kumar
Tunnel Magnetoresistance in Strained L10-FeAu Perpendicular Magnetic Tunnel JunctionFull-text access may be available. Sign in or learn about subscription options.pp. 284-289
by Rouf Rahman Sheikh, Ram Krishna Ghosh
AI-Driven Anomaly Detection in Oscilloscope Images for Post-Silicon ValidationFull-text access may be available. Sign in or learn about subscription options.pp. 290-295
by Kowshic A. Akash, Tobias Wulf, Torsten Valentin, Alexander Geist, Ulf Kulau, Sohan Lal
QuaLITi: Quantum Machine Learning Hardware Selection for Inferencing with Top-Tier PerformanceFull-text access may be available. Sign in or learn about subscription options.pp. 296-301
by Koustubh Phalak, Swaroop Ghosh
8GHz Multi-Phase Ring VCO Design with Wide Tuning Range for SerDes Applications in 6nm FinFET ProcessFull-text access may be available. Sign in or learn about subscription options.pp. 302-307
by Ravuru Vasudeva Reddy, Siva Kumar Rapina, Siddhartha Hazra, K Sarangam
PPA-Aware Power Grid Optimization Techniques for Congested High Frequency Datapath DesignsFull-text access may be available. Sign in or learn about subscription options.pp. 308-313
by Cheryl Mary Joyce, Parag Upadhyay, Sashank Nishad, Abhimanyu Kakkar
DNA-CIM: DNA Sequence Analysis Using RRAM-Based Compute In-Memory AcceleratorFull-text access may be available. Sign in or learn about subscription options.pp. 314-319
by Chithambara Moorthii, Anmol Singla, Manan Suri
K Band High Power Broadband AlGaN/GaN HEMT Balanced Power Amplifier for Satellite TransponderFull-text access may be available. Sign in or learn about subscription options.pp. 320-325
by Ritan Das, Basudev Majumder
Meta-Heuristic Optimization of Custom Heterogeneous Blocks Defined eFPGA DesignFull-text access may be available. Sign in or learn about subscription options.pp. 326-331
by D V Bhargav, G Pradyumna, Madhav Rao
Accelerated Design Verification Coverage Closure Using Machine LearningFull-text access may be available. Sign in or learn about subscription options.pp. 332-337
by Shivani Jayakumar, Prasanth Viswanathan Pillai, Sumit Kumar Mandal
Low Form-Factor Switchless Dual-Band Matching Network for RF Power Harvesting SystemsFull-text access may be available. Sign in or learn about subscription options.pp. 338-343
by Arun Mohan, Saroj Mondal, Yash N Rayudu, Roy P. Paily
Physical Insights into the Leakage Mechanisms Governing the Scaling Trends in 4H-SiC Based Junctionless FETsFull-text access may be available. Sign in or learn about subscription options.pp. 344-350
by Jaspreet Singh, Aakash Kumar Jain, M. Jagadesh Kumar
Constructing Rectilinear Steiner Minimum Tree with Conditional Generative Adversarial NetworkFull-text access may be available. Sign in or learn about subscription options.pp. 351-356
by Kritanta Saha, Pritha Banerjee, Susmita Sur-Kolay
CMOSP18 FD-SOI Technology Based MCU Achieving High Performance of 1.2GHz Using High Speed, Optimized Leakage & High Density Tightly Coupled Memory (TCM)Full-text access may be available. Sign in or learn about subscription options.pp. 357-361
by Praveen Verma, Anuj Dhillon, Ashfaque Ahmed, Yagnesh Vaderiya, Chandan Singh, Veenita Kumari, Harshit Sharma
Low-Power and Superior Performance Design of Ternary Logic Cells Using CNFET and MOSFET Devices for VLSI ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 362-367
by Siva Chinmai Varma Bhupathiraju, Sridhara Sai Krishna, Yashwanth Komuravelly, Ramakant Yadav
TIPAngle: Traffic Tracking at City Scale by Pose Estimation of Pan and Tilt Intersection CamerasFull-text access may be available. Sign in or learn about subscription options.pp. 368-373
by Shreehari Jagadeesha, Edward Andert, Aviral Shrivastava
Symmetry-Based Synthesis for Interpretable Boolean EvaluationFull-text access may be available. Sign in or learn about subscription options.pp. 374-379
by Andrea Costamagna, Alan Mishchenko, Satrajit Chatterjee, Giovanni De Micheli
A Low-Power, Low-Noise, High-Performance Re-Convergent Clock Mesh Design for Large AI Compute ClustersFull-text access may be available. Sign in or learn about subscription options.pp. 380-385
by Harivinay Kancharla, Sounil Biswas
Analysis and Design Considerations for MASH of Noise Shaped SAR ADCsFull-text access may be available. Sign in or learn about subscription options.pp. 386-391
by R Arundeepakvel, Ankesh Jain
A Study on the Impact of Temperature-Dependent Ferroelectric Switching Behavior in 3D Memory ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 392-397
by Varun Darshana Parekh, Yi Xiao, Yixin Xu, Zijian Zhao, Zhouhang Jiang, Rudra Biswas, Sumitha George, Kai Ni, Vijaykrishnan Narayanan
Atrial Flutter Detection System by AdEx Encoded Lead-II ECGFull-text access may be available. Sign in or learn about subscription options.pp. 398-403
by Sushmi R, Priya K, Binsu J Kailath
Codesign for Broadcast Addressing Biochip Towards Tamper-Resistance and Enhanced ReliabilityFull-text access may be available. Sign in or learn about subscription options.pp. 404-409
by Ritwika Majumdar, Piyali Datta, Arpan Chakraborty, Rajat Kumar Pal
Advancing Functional Safety: Improving Failure Mode Analysis and Fault Injection Using Automation and GNN AlgorithmsFull-text access may be available. Sign in or learn about subscription options.pp. 410-415
by Amurt Prakash, Abhijeet Singh, Pooja Madhusoodhanan, Padma Arvind, Prasanth Viswanathan Pillai, Sanjay Das, Kanad Basu
Quantum Analysis of LESCAFull-text access may be available. Sign in or learn about subscription options.pp. 416-420
by Sumanta Chakraborty, Debajyoti Mandal, SK Hafizul Islam
2D Thermal Contour Modeling of 14 nm SOI FinFET Using Machine Learning for Efficient Thermal Profile PredictionFull-text access may be available. Sign in or learn about subscription options.pp. 421-426
by Banit Negi, Hariharan Muthusamy, Vivek Kumar
An Efficient RISC-V Vector Coprocessor for Heart Rate Variability Detection on EdgeFull-text access may be available. Sign in or learn about subscription options.pp. 427-432
by Uday Kiran Pedada, Tarun Sharma, Deepank Grover, Sujay Deb
Fast Bit-Sliced VLSI Architectures on FPGA for Montgomery Domain Modular InversionFull-text access may be available. Sign in or learn about subscription options.pp. 433-438
by Soham Adhikary, Ayan Palchaudhuri
An Ensemble MLP-RF Model for the Prediction of DG-MOSFETs: Addressing Fabrication Process VariationsFull-text access may be available. Sign in or learn about subscription options.pp. 439-444
by Vaikunth Muthuraman, Khushwant Sehra, Vandana Kumari, Manoj Saxena
LO-SC: Local-Only Split Computing for Accurate Deep Learning on Edge DevicesFull-text access may be available. Sign in or learn about subscription options.pp. 445-450
by Luigi Capogrosso, Enrico Fraccaroli, Marco Cristani, Franco Fummi, Samarjit Chakraborty
OwlsEye: Real-Time Low-Light Video Instance Segmentation on Edge and Exploration of Fixed-Posit QuantizationFull-text access may be available. Sign in or learn about subscription options.pp. 451-456
by Gaurav Shah, Abhinav Goud, Zaqi Momin, Joycee Mekie
Novel Hardware Architectures for PRESENT Block Cipher and its FPGA RealizationsFull-text access may be available. Sign in or learn about subscription options.pp. 457-462
by Ruby Mishra, Manish Okade, Kamalakanta Mahapatra
HyCMAx: Power-Efficient Hybrid CMOS-Memristor Based Approximate Dividers for Error-Resilient ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 463-468
by Monika Pokharia, Het Trivedi, Siddharth Doshi, Ravi S. Hegde, Joycee Mekie
TRANSPOSE: Circuit Transformations for Power Side-Channel Security at Register Transfer LevelFull-text access may be available. Sign in or learn about subscription options.pp. 469-474
by Nilotpola Sarma, Anuj Singh Thakur, Chandan Karfa
Optimization of Sub-Threshold Standard Cells for Energy Efficient DesignsFull-text access may be available. Sign in or learn about subscription options.pp. 475-480
by Vardhan Suroshi, Karthik B K, Vikram Kannur, Vinay Reddy, Madhura Purnaprajna
RISC-V Based Secure Processor Architecture for Return Address ProtectionFull-text access may be available. Sign in or learn about subscription options.pp. 481-486
by Lalit Sharma, Neeraj Goel
A 0.5pJ/bit 7.2Gbps HBM3 PHY on Intel4 with EMIB Packaging and Unmatched Receiver Architecture on PHY Side with Per Bit Deskew CorrectionFull-text access may be available. Sign in or learn about subscription options.pp. 487-492
by Aakash Hasmukhray Mehta, Javed S Gaggatur, Mohammad M. Rashid, Sampath Dakshinamurthy, Aruna Kumar Lakya Srinivasamurthy, Anil Kumar Goyal, Subbarao Manam, Harshit Gupta, Sandeep Sukumar, Vipin K Mishra, Koushik N S, Santosh Nekkanti, Sambaran Mitra, Pooja K Jadhav, Miryala ChandraShekar, Dudekula Humayun, Michael C Rifani, Jianyong Xie, Andrew P Collins
Leveraging Dual Output LUTs with Pipelining for Efficient BCD to Binary Converter on FPGAFull-text access may be available. Sign in or learn about subscription options.pp. 493-498
by Santosh Kumar, Ayan Palchaudhuri
A First-Principles-Based Comparative Study Between Pristine and Au-Modified Graphene Nanosheet Towards Acetaldehyde Sensing PerformanceFull-text access may be available. Sign in or learn about subscription options.pp. 499-504
by Indranil Maity, Soubarno Chatterjee, Souvik Bhanja
Robust Verification Methodology for Scan Chain in MemoriesFull-text access may be available. Sign in or learn about subscription options.pp. 505-509
by Rajat Kohli, Umang Deep, Vaishnavi Holla, Jwalant Kumar Mishra
Reliable High-Performance Programmable Voltage Regulator with 0.55A Sink Current for Cryo-Cooler Electronics in 0.18μm HV-CMOS TechnologyFull-text access may be available. Sign in or learn about subscription options.pp. 510-515
by Nishant Kumar, Hari Shanker Gupta, Nihar Ranjan Mohapatra
TimeFloats: Train-in-Memory with Time-Domain Floating-Point Scalar ProductsFull-text access may be available. Sign in or learn about subscription options.pp. 516-521
by Maeesha Binte Hashem, Benjamin Parpillon, Divake Kumar, Dinithi Jayasuriya, Amit Ranjan Trivedi
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