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2013 IEEE 31st VLSI Test Symposium (VTS)

April 29 2013 to May 2 2013

Berkeley, CA

Table of Contents

VTS 2012 Best Paper award [includes Best Special Session Award]Freely available from IEEE.pp. 1-3
TTTC: Test technology technical councilFreely available from IEEE.pp. 1-3
Experiments and analysis to characterize logic state retention limitations in 28nm process nodeFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by S. Dasnurkar, A. Datta, M. Abu-Rahma, H. Nguyen, M. Villafana, H. Rasouli, S. Tamjidi, Ming Cai, S. Sengupta, P. R. Chidambaram, R. Thirumala, N. Kulkarni, P. Seeram, P. Bhadri, P. Patel, Sei Seung Yoon, E. Terzioglu
Testing retention flip-flops in power-gated designsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Hao-Wen Hsu, Shih-Hua Kuo, Wen-Hsiang Chang, Shi-Hao Chen, Ming-Tung Chang, Mango C.-T Chao
Power supply noise control in pseudo functional testFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Tengteng Zhang, Duncan M. Hank Walker
Finding best voltage and frequency to shorten power-constrained test timeFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by P. Venkataramani, S. Sindia, V. D. Agrawal
Improving test generation by use of majority gatesFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by P. Wohl, J. A. Waicukauski
SOC test compression scheme using sequential linear decompressors with retained free variablesFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by S. S. Muthyala, N. A. Touba
Selection of tests for outlier detectionFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by H. C. M. Bossers, J. L. Hurink, G. J. M. Smit
Tracing the best test mix through multi-variate quality trackingFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by B. Arslan, A. Orailoglu
Innovative practices session 1C: Post-silicon validationFull-text access may be available. Sign in or learn about subscription options.pp. 1-2
by N. Hakim, C. Meissner
Measurement of envelope/phase path delay skew and envelope path bandwidth in polar transmittersFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Jae Woong Jeong, S. Ozev, S. Sen, T. M. Mak
Defect-oriented non-intrusive RF test using on-chip temperature sensorsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by L. Abdallah, H. Stratigopoulos, S. Mir, J. Altet
Novel estimation method of EVM with channel correction for linear impairments in multi-standard RF transceiversFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by K. Asami, T. Shimura, T. Kurihara
New topic session 2B: Why (Re-)Designing Biology is ∗Slightly∗ more challenging than designing electronicsFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Bozena Kaminska, Bernard Courtois, Soha Hassoun
Innovative practices session 2C: Memory testFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Charutosh Dixit, Ramesh Tekumalla, Sreejit Chakravarty, Manuel D'Abreu, Zhuoyu Bao, Concetta Riccobene
An effective solution for building memory BIST infrastructure based on fault periodicityFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by G. Harutyunyan, S. Shoukourian, V. Vardanian, Y. Zorian
A built-in scheme for testing and repairing voltage regulators of low-power sramsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by L. B. Zordan, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, N. Badereddine
Testing of a low-VMIN data-aware dynamic-supply 8T SRAMFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Chen-Wei Lin, Chin-Yuan Huang, Mango C.-T Chao
Special session 3B: E.J. McCluskey Doctoral Thesis Award semi-final — PostersFreely available from IEEE.pp. 1-1
by M. Portolan, M. Maniatakos
Innovative practices session 3C: Harnessing the challenges of testability and debug of high speed I/OsFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Saghir A Shaikh
Hot topic session 4A: Reliability analysis of complex digital systemsFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Adrian Evans, Michael Nicolaidis, Rob Aitken, Burcin Aktan, Olivier Lauzeral
Special session 4C: Hot topic 3D-IC design and testFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Jin-Fu Li, Cheng-Wen Wu, Cheng-Wen Wu, Masahiro Aoyagi, Meng-Fan Marvin Chang, Ding-Ming Kwai
Extending pre-silicon delay models for post-silicon tasks: Validation, diagnosis, delay testing, and speed binningFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by P. Das, S. K. Gupta
Path selection based on static timing analysis considering input necessary assignmentsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Bo Yao, A. Sinha, I. Pomeranz
Scalable dynamic technique for accurately predicting power-supply noise and path delayFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by S. K. Rao, R. Robucci, C. Patel
Contactless test access mechanism for TSV based 3D ICsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by R. Rashidzadeh
3D-IC interconnect test, diagnosis, and repairFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Chun-Chuan Chi, Cheng-Wen Wu, Min-Jer Wang, Hung-Chih Lin
Testing of flow-based microfluidic biochipsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Kai Hu, Tsung-Yi Ho, K. Chakrabarty
Innovative practices session 5C: Cloud atlas — Unreliability through massive connectivityFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Helia Naeimi, Suriya Natarajan, Kushagra Vaid, Prabhakar Kudva, Mahesh Natu
A framework for low overhead hardware based runtime control flow error detection and recoveryFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by A. Chaudhari, Junyoung Park, J. Abraham
Trading off area, yield and performance via hybrid redundancy in multi-core architecturesFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Yue Gao, Yang Zhang, Da Cheng, M. A. Breuer
Combining checkpointing and scrubbing in FPGA-based real-time systemsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Aitzan Sari, M. Psarakis, D. Gizopoulos
An IDDQ BIST approach to characterize phase-locked loop parametersFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by S. Maltabas, O. K. Ekekon, K. Kulovic, A. Meixner, M. Margala
A programmable BIST design for PLL static phase offset estimation and clock duty cycle detectionFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Sen-Wen Hsiao, Nicholas Tzou, A. Chatterjee
Reduced code linearity testing of pipeline adcs in the presence of noiseFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by A. Laraba, H. Stratigopoulos, S. Mir, H. Naudet, G. Bret
Innovative practices session 6C: Latest practices in test compressionFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by J. Colburn, K.-Y. Chung, H. Konuk, Y. Dong
Enhanced algorithm of combining trace and scan signals in post-silicon validationFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Kihyuk Han, Joon-Sung Yang, J. A. Abraham
Distributed dynamic partitioning based diagnosis of scan chainFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Yu Huang, Xiaoxin Fan, Huaxing Tang, M. Sharma, Wu-Tung Cheng, B. Benware, S. M. Reddy
RAVAGE: Post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuningFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by B. Muldrey, S. Deyati, M. Giardino, A. Chatterjee
New topic session 7B: Challenges and directions for ultra-low voltage VLSI circuits and systems: CMOS and beyondFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Bozena Kaminska, Bernard Courtois, Massimo Alioto
Innovative practices session 7C: Self-calibration & trimmingFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Chen-Yong Cher, Yiorgos Makris, C. Thibeault, Alan J. Drake
Special session 8A: McCluskey Doctoral Thesis Award semi-final — presentationsFreely available from IEEE.pp. 1-1
by M. Portolan, M. Maniatakos
Special session 8B: Embedded tutorial challenges in SSDFreely available from IEEE.pp. 1-1
by Manuel d'Abreu, Amitava Mazumdar
A study on the effectiveness of Trojan detection techniques using a red team blue team approachFull-text access may be available. Sign in or learn about subscription options.pp. 1-3
by X. Zhang, K. Xiao, M. Tehranipoor, J. Rajendran, R. Karri
A multi-parameter functional side-channel analysis method for hardware trust verificationFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
by C. Bell, M. Lewandowski, S. Katkoori
Experiences in side channel and testing based Hardware Trojan detectionFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
by D. Hely, J. Martin, G. D. P. Triana, S. P. Mounier, E. Riviere, T. Sahuc, J. Savonet, L. Soundararadjou
A multi-faceted approach to FPGA-based Trojan circuit detectionFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
by M. Patterson, A. Mills, R. Scheel, J. Tillman, E. Dye, J. Zambreno
Towards a cost-effective hardware trojan detection methodologyFull-text access may be available. Sign in or learn about subscription options.pp. 1-3
by R. Paseman, A. Orailoglu
A hybrid ECC and redundancy technique for reducing refresh power of DRAMsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Yun-Chao Yu, Chih-Sheng Hou, Li-Jung Chang, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
An iterative diagnosis approach for ECC-based memory repairFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by P. Papavramidou, M. Nicolaidis
Investigation of gate oxide short in FinFETs and the test methods for FinFET SRAMsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Chen-Wei Lin, M. C.-T Chao, Chih-Chieh Hsu
Special session 9B: Embedded tutorial embedded DfT instrumentation: Design, access, retargeting and case studiesFreely available from IEEE.pp. 1-2
by Erik Larsson
Innovative practices session 9C: Yield improvement: Challenges and directionsFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by B. Seshadri, B. Cory, S. Mitra
On the investigation of built-in tuning of RF receivers using on-chip polyphase filtersFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by F. Haddad, W. Rahajandraibe, H. Aziza, K. Castellani-Coulie, J.-M Portal
On-chip circuit for measuring multi-GHz clock signal waveformsFull-text access may be available. Sign in or learn about subscription options.pp. 1-4
by K. A. Jenkins, P. Restle, P. Z. Wang, D. Hogenmiller, D. Boerstler, T. Bucelot
Low-cost multi-channel testing of periodic signals using monobit receivers and incoherent subsamplingFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Thomas Moon, Hyun Woo Choi, A. Chatterjee
Papers
ForewordFull-text access may be available. Sign in or learn about subscription options.pp. 1
Chip-level modeling and analysis of electrical masking of soft errorsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by S. Kiamehr, M. Ebrahimi, F. Firouzi, M. B. Tahoori
Papers
AcknowledgmentsFull-text access may be available. Sign in or learn about subscription options.pp. 1
Identification of critical variables using an FPGA-based fault injection frameworkFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by A. Riefert, J. Muller, M. Sauer, W. Burgard, B. Becker
RSAK: Random stream attack for phase change memory in video applicationsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Yuntan Fang, Huawei Li, Xiaowei Li
Innovative practices session 10C: Delay testFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by P. Pant, M. Amodeo, S. Vora, J. Colburn
Papers
[Title page]Full-text access may be available. Sign in or learn about subscription options.pp. 1
Post-DfT-insertion retiming for delay recovery on inter-die paths in 3D ICsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by B. Noia, K. Chakrabarty
Papers
Organizing committeeFull-text access may be available. Sign in or learn about subscription options.pp. 1-3
Allocation of RAM built-in self-repair circuits for SOC dies of 3D ICsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by Chih-Sheng Hou, Jin-Fu Li
Special session 4B: Elevator talksFreely available from IEEE.pp. 1-1
by Jennifer Dworak, Ronald Shawn Blanton, Masahiro Fujita, Kazumi Hatayama, Naghmeh Karimi, Michail Maniatakos, Antonis Paschalis, Adit Singh, Tian Xia
Test-cost optimization and test-flow selection for 3D-stacked ICsFull-text access may be available. Sign in or learn about subscription options.pp. 1-6
by M. Agrawal, K. Chakrabarty
Papers
[Front cover]Full-text access may be available. Sign in or learn about subscription options.pp. 1
Special session 11B: Hot topic on-chip clocking — Industrial trendsFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Anshuman Chandra
Papers
2013 IEEE 31th VLSI Test Symposium (VTS) [Copyright notice]Full-text access may be available. Sign in or learn about subscription options.pp. 1
Innovative practices session 11C: ResilienceFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Chen-Yong Cher, Mohan J. Kumar
Papers
Steering and program committeesFull-text access may be available. Sign in or learn about subscription options.pp. 1
Special session 12A: Hot topic counterfeit IC identification: How can test help?Full-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Ilia Polian, Mohammad Tehranipoor
Special session 12B: Panel post-silicon validation & test in huge variance eraFull-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Takahiro J. Yamaguchi, Jacob A. Abraham, Gordon W. Roberts, Suriyaprakash Natarajan, Dennis Ciplickas
Special session 12C: Town-hall meeting “young professionals in test”Full-text access may be available. Sign in or learn about subscription options.pp. 1-1
by Alodeep Sanyal, Yervant Zorian
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