Call for Papers about Agile and Open-Source Hardware
As the benefits of traditional technology scaling, like Dennard Scaling and Moore’s Law, slow significantly, computer architecture is poised to enter a golden age of innovation. Domain-specific architecture (DSA) is a promising solution to continue improving computing performance, while maintaining the level of energy efficiency previously found in technology scaling. Unfortunately, traditional methodologies of chip design and hardware development have created significant barriers, requiring extremely high non-recurring engineering (NRE) costs in tools, labor, IPs, etc., ultimately prohibiting the wide adoption of DSA.
In contrast, the significant engineering costs and extremely long design cycles of software have shrunk significantly over the past decades due to the proliferation of open-source software and the use of agile software development techniques. Small teams of software developers can now realize their innovative ideas quickly. Inspired by these results from the software community, agile and open hardware design is considered to be one of the most promising ways to lower the design cost of chip design, although there are still many challenges in abstraction, methodologies, and tools. This special issue of IEEE Micro will explore academic and industrial research on topics that relate to agile chip design and open-source hardware. Such topics include, but are not limited to:
- Agile DSA accelerator design approaches, targeting ASICs or reconfigurable fabrics (e.g. FPGAs)
- Open-source EDA tools and methodologies to enable agile hardware development
- High-level hardware abstraction and representation
- New hardware description languages
- Domain-specific languages (DSLs)
- Agile hardware development for formally verified designs
- Agile domain-specific ISA/extension design
- Hardware generator methodologies
- Verification and simulation approaches
- Fast chip design-space exploration
- Agile hardware and software co-design approaches
- Comparison studies of different hardware design and development approaches
- Survey and tutorial studies of agile and open-source hardware
Important Dates for IEEE Micro’s CFP
- Submissions due: CLOSED
- Initial notifications: March 6, 2020
- Revised papers due: April 10, 2020
- Final notifications: May 15, 2020
- Final versions due: June 1, 2020
- Publication: July/August 2020
Submission guidelines
Please see the Author Information page and the Magazine Peer Review page for more information. Please submit electronically through ScholarOne Manuscripts (https://mc.manuscriptcentral.com/cs-ieee), selecting this special-issue option.
Questions?
Contact guest editors Yungang Bao and Trevor E. Carlson at micro4-20@computer.org or the editor-in-chief Lizy John at ljohn@ece.utexas.edu.
