Abstract
MOSFETs play a vital role in integrated circuits in contemporary society. As the development of performance improvements by compressing the physical length of MOSFETs has slowed down, gate stack technology is used to improve their performance. As a gate dielectric material, can no longer meet the needs of performance and power consumption, so replacing with high-k material is an inevitable choice. This paper is to summarize the way to compare the performance of MOSFET devices and conclude a current better structure of it. It concludes the parameters that can be used to compare the performance of different dielectric gate stack technologies, such as Drain-induced barrier lowering, Subthreshold Swing, threshold voltage, and so on, and compares the performance parameters of MOSFET devices under different structures such as with a buffer layer or with a sidewall or without both of them, to obtain the optimal device structure. This result is helpful for choosing the parameter to compare the performance of MOSFET devices.