Multiple fault detection in CMOS logic circuits

D. Lu; C.Q. Tong

doi:10.1109/ICCD.1992.276292

Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors

Multiple fault detection in CMOS logic circuits

Year: 1992, Pages: 373,374,375,376

DOI Bookmark: 10.1109/ICCD.1992.276292

Authors

D. Lu, Dept. of Electr. Eng., Colorado State Univ., Fort Collins, CO, USA
C.Q. Tong, Dept. of Electr. Eng., Colorado State Univ., Fort Collins, CO, USA

Abstract

The possibility of using a single stuck-at fault test set to detect multiple faults and their combinations is studied. It is shown that a single stuck-at fault test set can detect single and multiple self-feedback bridging faults and combinations of feedback bridging, input bridging, and stuck-on faults when current monitoring is done. It is proved that a single stuck-at fault test set can detect the combination of single stuck-open fault and some other faults like bridging and stuck-on faults when both logic and current monitoring are done.<>

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Authors

Abstract

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