1991 International Symposium on VLSI Technology, Systems, and Applications
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Abstract

Fast motion detection is an important step in the high-speed video/vision processing systems. System-level design of a 2-dimensional mesh-concerned competitive neural network for video motion detection is presented. The motion information from a sequence of images can be obtained through mixed-analog/digital signal processing. Massively parallel neurocomputing is performed by multiple copies of compact and efficient neuroprocessors. Inter-processor data transfer is carried out by dedicated point-to-point analog interconnections. Global data communication between the host computer and neuroprocessors is through the digital common bus to maintain strong signal strength. An extendable analog winner-take-all circuit is used to implement the competition function with a minimal delay time. A 1.5*2.8-cm/sup 2/ chip in a 1.2- mu m CMOS technology can accommodate 64 velocity-selective neuroprocessors. This chip can achieve 83.2 Giga-connections per second. By using 128 VLSI neural chips, the speed-up factor over the Sun-4/60 SPARC station-1 is estimated to by 54545.<>
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