LOS ALAMITOS, Calif., 26 February 2018 – Oyekunle Olukotun, Cadence Design Systems Professor of Electrical Engineering and Computer Science at Stanford University, has been selected to receive the IEEE Computer Society 2018 Harry H. Goode Award.
The Goode Award was established to recognize achievements in the information processing field which are considered either a single contribution of theory, design, or technique of outstanding significance, or the accumulation of important contributions on theory or practice over an extended time period.
A well-known pioneer in multicore processor design and the leader of the Stanford Hydra Chip Multiprocessor (CMP) research project, Olukotun is being recognized “for fundamental and sustained effort to create and leverage chip-multiprocessors.”
Olukotun founded Afara Websystems to develop high-throughput, low-power multicore processors for server systems. The Afara multicore processor, called Niagara, was acquired by Sun Microsystems. Niagara derived processors now power all Oracle SPARC-based servers and have generated billions of dollars of revenue.
Olukotun made substantial contributions to advancing transactional memory (TM) technology. TM technology simplifies multicore programming by providing developers with an intuitive, high-level abstraction to manage concurrency and synchronization. He co-lead the Transactional Coherence and Consistency (TCC) project that explored many hardware and software aspects of TM technology. The TCC project produced a number of significant contributions including the design of multicore architectures that use memory transactions as the exclusive unit of parallel work, memory coherence, and memory consistency.
Olukotun is an innovator in the use of Domain-Specific Languages (DSLs) for programming heterogeneous computer systems composed of multicores, GPUs and clusters. DSLs use high-level abstractions to simplify programming while achieving high performance in a heterogeneous environment. The Delite compiler framework was conceived to simplify the process of DSL development by providing components such as parallel patterns, locality and parallelism optimizations, and code generators that can be reused by many DSL implementations.
Olukotun is currently a member of the Data Analytics for What’s Next (DAWN) Lab which is developing infrastructure for usable machine learning. Olukotun is focusing on the design of domain-specific accelerators for machine learning and data analytics using parallel patterns.
Olukotun received his Ph.D. in Computer Engineering from the University of Michigan. He is an ACM Fellow and IEEE Fellow for contributions to multiprocessors on a chip and multi-threaded processor design.
The Goode Award consists of a bronze medal and a $2,000 honorarium. The award will be presented at the IEEE Computer Society annual awards ceremony to be held on Wednesday, 6 June 2018 in Phoenix, Arizona, USA. Learn more about the Goode Award, including a list of past recipients.
